1756-IF8H罗克韦尔PLC模块1756-IF8H
Allen-Bradley 1756-TBCH是Contrologix控制器平台的模拟输入模块。该模块主要具有八(8)个差分输入通道,与电压和电流信号兼容。它还增加了与高速可寻址远程传感器(HART)协议的兼容性,每个模块有一个HART调制解调器。1756-IF8H的可配置电流信号包括工业标准的0-20 mA和4-20 mA。对于电压输入信号,支持的电压为+/-10VDC、0-5 VDC、1-5 VDC和0-10 VDC。
该模块的分辨率范围为16-21位,背板电流要求为300mA@ 5.1VDC和135 mA@ 24 VDC。它的总背板功耗为4.77瓦,而热耗散则因配置信号而异。电压信号处理的热耗散为11/0 BTU / hr,电流为13.7 BTU / hr,开路检测时间为5秒,电压和电流信号配置的过压保护分别为30VDC和8VDC。该模块是单宽度模块,因此占用1756机箱的一个插槽。
它可以是本地/O或分布式/O系统的一部分。1756-F8H的HART扫描时间为1...488 ms和1秒(如果HART启用),同时所有通道HART激活,估计扫描时间为10秒。模块直通配置以及与HART通信和设备的通信可能会显著增加扫描时间。1756-FP8H使用逐次逼近法作为输入转换方法,而输出转换方法通过R-梯形DAC、单调性且无失码。

Allen-Bradley 1756-TBCH is an analog input module for the Contrologix controller platform. The module primarily has eight (8) differential input channels compatible with voltage and current signals. It also adds compatibility with the high-speed addressable Remote Sensor (HART) protocol, with a HART modem per module. Configurable current signals for the 1756-IF8H include industry standard 0-20 mA and 4-20 mA. For voltage input signals, the supported voltages are +/-10VDC, 0-5 VDC, 1-5 VDC, and 0-10 VDC.
The module has a resolution range of 16-21 bits, and the backplane current requirements are 300mA@5.1VDC and 135mA@24VDC. Its total backplane power consumption is 4.77 watts, while heat dissipation varies depending on the configuration signal. The heat dissipation for voltage signal processing is 11/0 BTU/hr, the current is 13.7 BTU/hr, the open circuit detection time is 5 seconds, and the overvoltage protection for voltage and current signal configurations is 30VDC and 8VDC, respectively. The module is a single width module and therefore occupies a slot in the 1756 chassis.
It can be part of a local /O or distributed /O system. HART scan time of 1756-F8H is 1... 488 ms and 1 second (if HART is enabled) with all channels HART activated at the same time, the estimated scan time is 10 seconds. Module pass-through configurations and communication with HART communications and devices can significantly increase scan times. The 1756-FP8H uses the successive approximation method as the input conversion method, while the output conversion method uses R-ladder DAC, monotonicity and no code loss.




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