PCD244A101 通道热电偶输入 ABB 中央控制器

PCD244A101 通道热电偶输入 ABB 中央控制器

当集电极被施加一个反向电压时， J1 就会受到反向偏压控制，耗尽层则会向N-区扩展。因过多地降低这个层面的厚度，将无法取得一个有效的阻断能力，所以，这个机制十分重要。另一方面，如果过大地增加这个区域尺寸，就会连续地提高压降。 第二点清楚地说明了NPT器件的压降比等效(IC 和速度相同) PT 器件的压降高的原因。

当栅极和发射极短接并在集电极 端子施加一个正电压时，P/N J3结受反向电压控制，此时，仍然是由N漂移区中的耗尽层承受外部施加的电压。

IGBT在集电极与发射极之间有一个寄生PNPN晶闸管。在特殊条件下，这种寄生器件会导通。这种现象会使集电极与发射极之间的电流量增加，对等效MOSFET的控制能力降低，通常还会引起器件击穿问题。晶闸管导通现象被称为IGBT闩锁，具体地说，这种缺陷的原因互不相同，与器件的状态有密切关系。通常情况下，静态和动态闩锁有如下主要区别：

当晶闸管全部导通时，静态闩锁出现，只在关断时才会出现动态闩锁。这一特殊现象严重地限制了安全操作区。为防止寄生NPN和PNP晶体管的有害现象，有必要采取以下措施：防止NPN部分接通，分别改变布局和掺杂级别，降低NPN和PNP晶体管的总电流增益。此外，闩锁电流对PNP和NPN器件的电流增益有一定的影响，因此，它与结温的关系也非常密切；在结温和增益提高的情况下，P基区的电阻率会升高，破坏了整体特性。因此，器件制造商必须注意将集电极zui大电流值与闩锁电流之间保持一定的比例，通常比例为1：5。

PCD244A101 通道热电偶输入 ABB 中央控制器
When a reverse voltage is applied to the collector, J1 is controlled by the reverse bias, and the depletion layer expands towards the N-region. This mechanism is important because reducing the thickness of this layer too much will not achieve an effective blocking capability. On the other hand, if the size of this area is increased excessively, the pressure drop will be continuously increased. The second point clearly explains why the NPT device has a higher pressure drop than the equivalent (IC and the same speed) PT device.

When the gate and emitter are short-circuited and a positive voltage is applied to the collector terminal, the P/ NJ3 junction is controlled by the reverse voltage, which is still subjected to the externally applied voltage by the depletion layer in the N-drift region.

The IGBT has a parasitic PNPN thyristor between the collector and the emitter. Under special conditions, this parasitic device will conduct. This phenomenon will increase the current flow between the collector and the emitter, reduce the control ability of the equivalent MOSFETs, and usually cause device breakdown problems. The thyristor conduction phenomenon is called IGBT latching, specifically, the reasons for this defect are different from each other, and are closely related to the state of the device. In general, static and dynamic latches have the following main differences:

Static latching occurs when the thyristor is fully on, and dynamic latching occurs only when the thyristor is turned off. This special phenomenon severely restricts the safe operation area. In order to prevent the harmful phenomenon of parasitic NPN and PNP transistors, it is necessary to take the following measures: prevent the partial switching of NPN, change the layout and doping level respectively, and reduce the total current gain of NPN and PNP transistors. In addition, the latching current has a certain effect on the current gain of PNP and NPN devices, so it is also closely related to the junction temperature. When the junction temperature gain is increased, the resistivity of the P-base region will increase, destroying the overall characteristics. Therefore, device manufacturers must take care to maintain a certain ratio between the maximum collector current value and the latch current, usually a ratio of 1:5.

PCD244A101 通道热电偶输入 ABB 中央控制器